okTFPGAResetProfile Struct Reference

Describes the sequence of events to perform after an FPGA configuration. More...

Public Attributes
UINT32	magic
	Magic number indicating the profile is valid. (4 byte = 0xBE097C3D)
UINT32	configFileLocation
	Location of the configuration file (Flash boot). (4 bytes)
UINT32	configFileLength
	Length of the configuration file. (4 bytes)
UINT32	doneWaitUS
	Number of microseconds to wait after DONE goes high before starting the reset profile. (4 bytes)
UINT32	resetWaitUS
	Number of microseconds to wait after wires are updated before deasserting logic RESET. (4 bytes)
UINT32	registerWaitUS
	Number of microseconds to wait after RESET is deasserted before loading registers. (4 bytes)
UINT32	padBytes1 [28]
	Reserved (112 bytes)
UINT32	wireInValues [32]
	Initial values of WireIns. These are loaded prior to deasserting logic RESET. (32*4 = 128 bytes)
UINT32	registerEntryCount
	Number of valid Register Entries (4 bytes)
okTRegisterEntry	registerEntries [256]
	Initial register loads. (256*8 = 2048 bytes)
UINT32	triggerEntryCount
	Number of valid Trigger Entries (4 bytes)
okTTriggerEntry	triggerEntries [32]
	Initial trigger assertions. These are performed last. (32*8 = 256 bytes)
UINT8	padBytes2 [1520]
	Reserved (1520 bytes)

Detailed Description

This structure defines the parameters of an FPGA reset profile.