Provides AXI-Stream read/write access to the FPGA.
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virtual UINT8 | GetWriteDatapathWidthByteCount (void) const =0 |
| | Returns the write datapath width in bytes.
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virtual UINT8 | GetReadDatapathWidthByteCount (void) const =0 |
| | Returns the read datapath width in bytes.
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virtual ErrorCode | Read (unsigned char *pBuffer, std::size_t bufferSize, UINT32 timeoutMilliseconds, UINT64 &transferByteCount)=0 |
| | Read data from the stream.
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virtual ErrorCode | Write (const unsigned char *pData, std::size_t dataSize, UINT32 timeoutMilliseconds, UINT64 &transferByteCount)=0 |
| | Write data to the stream.
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virtual ErrorCode | Reset (void)=0 |
| | Reset the AXI-Stream interface.
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ErrorCode | Read (unsigned char *pBuffer, std::size_t bufferSize, UINT64 &transferByteCount) |
| | Read data from the stream using the default timeout.
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ErrorCode | Write (const unsigned char *pData, std::size_t dataSize, UINT64 &transferByteCount) |
| | Write data to the stream using the default timeout.
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This interface provides streaming data transfer to and from the FPGA over the AXI-Stream protocol. Unlike AXI-Lite and AXI-Full, stream transfers are not address-based.
An instance of this class is obtained via okCFPGADataPortAXI::GetAXIStream().
- Note
- AXI data port support will be available in a future release. No currently supported devices provide this interface.
